1. Field of the Invention
This invention generally relates to methods and systems for classifying defects detected on a wafer.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a large number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices. For example, lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor water. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical-mechanical polishing, etch, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
Inspection processes are used at various steps during a semiconductor manufacturing process to detect defects on wafers. Inspection processes have always been an important part of fabricating semiconductor devices such as integrated circuits. However, as the dimensions of semiconductor devices decrease, inspection processes become even more important to the successful manufacture of acceptable semiconductor devices. For instance, as the dimensions of semiconductor devices decrease, detection of defects of decreasing size has become necessary since even relatively small defects may cause unwanted aberrations in the semiconductor devices.
Automatic defect classification (ADC) of semiconductor defects is an important application of wafer inspection and defect review tools. The most popular and most trusted defect classifiers and nuisance filters used during wafer inspection are manually created decision trees. By far, the most common method for creating defect classification trees is a manual approach with several ease-of-use features such as the ability to copy and paste sub-trees, etc.
Combination of defect classifiers for datasets with complex decision boundaries has been the source of intense study over the last two decades, and extensive literature exists on this topic. Many different combination schemes have been considered, including: (a) data level combination, (b) feature level combination (different feature spaces), (c) classifier combination (fixed classifiers with trainable combination rules, trainable classifiers with fixed combination rules, etc.), etc. In addition, the ability to sequence nuisance filters is available. However, sequencing nuisance filters is just a simple consecutive execution of independent classifiers without attempting to enhance performance by combining their strengths (e.g., the worst performing nuisance bin from the set of nuisance filters will remove the most defects of interest (DOIs)).
Accordingly, it would be advantageous to develop systems and/or methods for classifying defects detected on a wafer that can provide improved defect classification compared to the currently used methods and systems.